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A Novel Fast 2D Octolinear Minimum Spanning Tree Solution -
Digital hardware design requires determining a physical layout of circuits which matches their logical specifications. This work presents a novel fast scanline algorithm, deployed in production to show logically but not yet physically connected circuit elements. We present a proof based on non-Euclidean geometry that the generated connections are correct. In practice, this work dramatically improves the runtime of certain circuit design tools, from several hours down to a few seconds.

Bio: Joseph P. Skudlarek is a retired high tech industrial software professional, having worked primarily as a developer on operating systems and computer-aided design tools. He has held a number of positions in industry including both startups and established companies, most recently at Siemens Digital Industries Software.

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